WO2025133815 - OVERFITTING SHARED MULTIPLIERS
National phase entry is expected:
Publication Number
WO/2025/133815
Publication Date
26.06.2025
International Application No.
PCT/IB2024/062397
International Filing Date
09.12.2024
Title **
[English]
OVERFITTING SHARED MULTIPLIERS
[French]
MULTIPLICATEURS PARTAGÉS DE SUR-AJUSTEMENT
Applicants **
NOKIA TECHNOLOGIES OY
Inventors
YANG, Ruiying
CRICRÌ, Francesco
SANTAMARIA GOMEZ, Maria Claudia
Priority Data
63/612,109
19.12.2023
US
Application details
| Total Number of Claims/PCT | * |
| Number of Independent Claims | * |
| Number of Priorities | * |
| Number of Multi-Dependent Claims | * |
| Number of Drawings | * |
| Pages for Publication | * |
| Number of Pages with Drawings | * |
| Pages of Specification | * |
| * | |
| Number of Office Actions | * |
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International Searching Authority |
EPO
* |
| Recordal of a Change of the Applicant's Name/Address |
Change of Applicant's Name and Address
* |
| Type of Assignment |
The Standard Agent's Assignment
* |
| Applicant's Legal Status |
Legal Entity
* |
| * | |
| * | |
| * | |
| * | |
| * | |
| Entry into National Phase under |
Chapter I
* |
| Patent Delivery |
Send the Letters Patent by Courier
* |
| Translation |
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* The data is based on automatic recognition. Please verify and amend if necessary.
** IP-Coster compiles data from publicly available sources. If this data includes your personal information, you can contact us to request its removal.
Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing, Examination, Granting | 3289 | |
| EPO | Filing, Examination, Granting | 28025 | |
| Japan | Filing, Examination, Granting | 3264 | |
| South Korea | Filing, Examination, Granting | 4321 | |
| USA | Filing, Examination, Granting | 16940 |
Total:
55,839
The term for entry into the National Phase has expired. This quotation is for informational purposes only
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Abstract[English]
Various embodiments provide methods, apparatuses, and computer program products. An example apparatus includes at least one processor; and at least one non-transitory memory storing instructions that, when executed by the at least one processor, cause the apparatus at least to perform: multiplying C channels or portions of a tensor with respective C multipliers, wherein the tensor comprises an output of a layer of a neural network, and wherein values of the C multipliers are in a set of cardinality (K) less than C.[French]
Divers modes de réalisation proposent des procédés, des appareils, et des produits-programmes informatiques. Un appareil donné à titre d'exemple comprend au moins un processeur ; et au moins une mémoire non transitoire stockant des instructions qui, lorsqu'elles sont exécutées par le ou les processeurs, amènent l'appareil au moins à effectuer : la multiplication de C canaux ou de parties d'un tenseur avec C multiplicateurs respectifs, le tenseur comprenant une sortie d'une couche d'un réseau neuronal, et les valeurs des C multiplicateurs étant dans un ensemble de cardinalité (K) inférieur à C.