WO2026124718 - ELEKTRONIKANORDNUNG, INVERTER, VERFAHREN ZUM HERSTELLEN EINER ELEKTRONIKANORDNUNG
National phase entry is expected:
Publication Number
WO/2026/124718
Publication Date
18.06.2026
International Application No.
PCT/DE2025/101069
International Filing Date
17.11.2025
Title **
[German]
ELEKTRONIKANORDNUNG, INVERTER, VERFAHREN ZUM HERSTELLEN EINER ELEKTRONIKANORDNUNG
[English]
ELECTRONICS ASSEMBLY, INVERTER, AND METHOD FOR MANUFACTURING AN ELECTRONICS ASSEMBLY
[French]
ENSEMBLE ÉLECTRONIQUE, ONDULEUR ET PROCÉDÉ DE FABRICATION D'UN ENSEMBLE ÉLECTRONIQUE
Applicants **
SCHAEFFLER TECHNOLOGIES AG & CO. KG
Inventors
MÜNCH, Andreas
POLLE, Juri
Priority Data
102024137576.0
13.12.2024
DE
Application details
| Total Number of Claims/PCT | * |
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| Number of Multi-Dependent Claims | * |
| Number of Drawings | * |
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International Searching Authority |
EPO
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| Recordal of a Change of the Applicant's Name/Address |
Change of Applicant's Name and Address
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| Type of Assignment |
The Standard Agent's Assignment
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| Applicant's Legal Status |
Legal Entity
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| * | |
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| Entry into National Phase under |
Chapter I
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| Patent Delivery |
Send the Letters Patent by Courier
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| Translation |
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* The data is based on automatic recognition. Please verify and amend if necessary.
** IP-Coster compiles data from publicly available sources. If this data includes your personal information, you can contact us to request its removal.
Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing, Examination, Granting | 2024 | |
| EPO | Filing, Examination, Granting | 8126 | |
| Japan | Filing, Examination, Granting | 2155 | |
| South Korea | Filing, Examination, Granting | 2071 | |
| USA | Filing, Examination, Granting | 4740 |
Total:
19,116
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Abstract[German]
Offenbart wird eine Elektronikanordnung (EA), aufweisend: - einen Schaltungsträger (ST), - ein Halbleiterbauelement (HB), das in dem Schaltungsträger (ST) eingebettet ist und eine elektrische Kontaktoberfläche (KF1) aufweist, - wobei die Kontaktoberfläche (KF1) des Halbleiterbauelements (HB) mittels eines Mikrovias (MV) körperlich und elektrisch kontaktiert ist, wobei das Mikrovia (MV) aus einer metallischen, insb. kupferhaltigen, Sinterpaste (SP) in einem Sintervorgang auf die Kontaktoberfläche (KF1) des Halbleiterbauelements (HB) gesintert ist. Ferner werden ein Inverter mit einer genannten Elektronikanordnung (EA) sowie ein Verfahren zum Herstellen der genannten Elektronikanordnung (EA) beschrieben[English]
The invention relates to an electronics assembly (EA) comprising: - a circuit carrier (ST), - a semiconductor component (HB) which is embedded in the circuit carrier (ST) and has an electrical contact surface (KF1), - wherein the contact surface (KF1) of the semiconductor component (HB) is contacted physically and electrically by means of a microvia (MV), the microvia (MV) being sintered onto the contact surface (KF1) of the semiconductor component (HB) in a sintering process from a metallic, in particular copper-containing, sinter paste (SP). The invention also relates to an inverter comprising said electronics assembly (EA) and to a method for manufacturing said electronics assembly (EA)[French]
L'invention concerne un ensemble électronique (EA) comprenant : - un support de circuit (ST), - un composant semi-conducteur (HB) qui est intégré dans le support de circuit (ST) et a une surface de contact électrique (KF1), - la surface de contact (KF1) du composant semi-conducteur (HB) étant mise en contact physiquement et électriquement au moyen d'un micro-trou d'interconnexion (MV), le micro-trou d'interconnexion (MV) étant fritté sur la surface de contact (KF1) du composant semi-conducteur (HB) dans un processus de frittage à partir d'une pâte de frittage (SP) métallique, en particulier contenant du cuivre. L'invention concerne également un onduleur comprenant ledit ensemble électronique (EA) et un procédé de fabrication dudit ensemble électronique (EA).