WO2026066892 - OPTOELECTRONIC CO-PACKAGING STRUCTURE AND OPTICAL MODULE
National phase entry is expected:
Publication Number
WO/2026/066892
Publication Date
02.04.2026
International Application No.
PCT/CN2025/117165
International Filing Date
27.08.2025
Title **
[English]
OPTOELECTRONIC CO-PACKAGING STRUCTURE AND OPTICAL MODULE
[French]
STRUCTURE DE CO-ENCAPSULATION OPTOÉLECTRONIQUE ET MODULE OPTIQUE
[Chinese]
光电共封装结构和光模块
Applicants **
INNOLIGHT TECHNOLOGY (SUZHOU) LTD.
TERAHOP PTE. LTD.
Inventors
FANG, Xigui
YU, Dengqun
CHEN, Qin
ZHENG, Qiuyu
RUAN, Sida
WANG, Xiangzhong
Priority Data
202422364178.6
27.09.2024
CN
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International Searching Authority |
CNIPA
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Change of Applicant's Name and Address
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The Standard Agent's Assignment
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Legal Entity
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| Entry into National Phase under |
Chapter I
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Send the Letters Patent by Courier
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Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing, Examination, Granting | 1721 | |
| EPO | Filing, Examination, Granting | 11551 | |
| Japan | Filing, Examination, Granting | 2154 | |
| South Korea | Filing, Examination, Granting | 2132 | |
| USA | Filing, Examination, Granting | 4740 |
Total:
22,298
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Abstract[English]
An optoelectronic co-packaging structure (100) and an optical module (200). The optoelectronic co-packaging structure (100) comprises a multi-layer circuit board (110), a photonic integrated circuit chip (120) and an anti-warpage member (130). The photonic integrated circuit chip (120) is provided with an optical waveguide and an optical coupling port (121) connected to the optical waveguide, the optical coupling port (121) being used for optical coupling with an external optical element of the photonic integrated circuit chip (120); the photonic integrated circuit chip (120) is flip-chip bonded onto the multi-layer circuit board (110) and is electrically connected to the multi-layer circuit board (110); and the anti-warpage member (130) is arranged in the multi-layer circuit board (110). The projection of the photonic integrated circuit chip (120) on the surface of the multi-layer circuit board (110) at least partially overlaps that of the anti-warpage member (130) on the surface of the multi-layer circuit board (110). Since the multi-layer circuit board (110) is provided with the anti-warpage member (130), packaging stress can be reduced, thereby reducing warpage deformation of the multi-layer circuit board (110) and the photonic integrated circuit chip (120), improving packaging quality and reliability.[French]
L'invention concerne une structure de co-encapsulation optoélectronique (100) et un module optique (200). La structure de co-encapsulation optoélectronique (100) comprend une carte de circuit imprimé multicouche (110), une puce de circuit intégré photonique (120) et un élément anti-gauchissement (130). La puce de circuit intégré photonique (120) est pourvue d'un guide d'ondes optique et d'un port de couplage optique (121) connecté au guide d'ondes optique, le port de couplage optique (121) étant utilisé pour un couplage optique avec un élément optique externe de la puce de circuit intégré photonique (120) ; la puce de circuit intégré photonique (120) est liée par retournement sur la carte de circuit imprimé multicouche (110) et est électriquement connectée à la carte de circuit imprimé multicouche (110) ; et l'élément anti-gauchissement (130) est disposé dans la carte de circuit imprimé multicouche (110). La projection de la puce de circuit intégré photonique (120) sur la surface de la carte de circuit imprimé multicouche (110) chevauche au moins partiellement celle de l'élément anti-gauchissement (130) sur la surface de la carte de circuit imprimé multicouche (110). Étant donné que la carte de circuit imprimé multicouche (110) est pourvue de l'élément anti-gauchissement (130), une contrainte d'encapsulation peut être réduite, ce qui permet de réduire la déformation de gauchissement de la carte de circuit imprimé multicouche (110) et de la puce de circuit intégré photonique (120), d'améliorer la qualité et la fiabilité d'encapsulation.[Chinese]
一种光电共封装结构（100）和光模块（200）。光电共封装结构（100）包括多层电路板（110）、光子集成电路芯片（120）和防翘曲件（130）。光子集成电路芯片（120）内设有光波导以及连接光波导的光耦合端口（121）；光耦合端口（121）用于与光子集成电路芯片（120）外部的光学元件光耦合；光子集成电路芯片（120）倒装焊接于多层电路板（110）上且与多层电路板（110）电性连接；防翘曲件（130）设于多层电路板（110）内；光子集成电路芯片（120）在多层电路板（110）表面上的投影和防翘曲件（130）在多层电路板（110）表面上的投影至少部分重叠，由于多层电路板（110）设有防翘曲件（130），可降低封装应力，从而减小多层电路板（110）及光子集成电路芯片（120）的翘曲变形，提高封装质量和可靠性。