WO2024192946 - METHODS, SYSTEMS, AND APPARATUS FOR CHANNEL-DEPENDENT ERROR CORRECTION CODING

National phase entry:
Publication Number WO/2024/192946
Publication Date 26.09.2024
International Application No. PCT/CN2023/111102
International Filing Date 03.08.2023
Title **
[English] METHODS, SYSTEMS, AND APPARATUS FOR CHANNEL-DEPENDENT ERROR CORRECTION CODING
[French] PROCÉDÉS, SYSTÈMES ET APPAREIL DE CODAGE DE CORRECTION D'ERREUR DÉPENDANT D'UN CANAL
Applicants **
HUAWEI TECHNOLOGIES CO., LTD. Huawei Administration Building, Bantian, Longgang District Shenzhen, Guangdong 518129, CN
Inventors
ZHANG, Huazi Suite 400, 303 Terry Fox Drive, Kanata Ontario 231, CA
MA, Jianglei Suite 400, 303 Terry Fox Drive, Kanata Ontario 231, CA
WANG, Jun Huawei Administration Building, Bantian,Longgang District Shenzhen, Guangdong 518129, CN
GE, Yiqun Suite 400, 303 Terry Fox Drive, Kanata Ontario 231, CA
BI, Xiaoyan Suite 400, 303 Terry Fox Drive, Kanata Ontario 231, CA
ZHU, Peiying Suite 400, 303 Terry Fox Drive, Kanata Ontario 231, CA
TONG, Wen Suite 400, 303 Terry Fox Drive, Kanata Ontario 231, CA
Priority Data
63/454,070   23.03.2023   US
front page image
Application details
Total Number of Claims/PCT *
Number of Independent Claims *
Number of Priorities *
Number of Multi-Dependent Claims *
Number of Drawings *
Pages for Publication *
Number of Pages with Drawings *
Pages of Specification *
*
*
International Searching Authority
*
Applicant's Legal Status
*
*
*
*
*
Entry into National Phase under
*
Translation

Recalculate

* The data is based on automatic recognition. Please verify and amend if necessary.

** IP-Coster compiles data from publicly available sources. If this data includes your personal information, you can contact us to request its removal.

Quotation for National Phase entry

Country StagesTotal
China Filing2830
EPO Filing, Examination25371
Japan Filing531
South Korea Filing575
USA Filing, Examination14085
MasterCard Visa

Total: 43392

The term for entry into the National Phase has expired. This quotation is for informational purposes only

Abstract[English] Blocks of encoded bits are obtained by encoding input bits, and are output, for transmission for example. Each of the blocks of encoded bits has a respective associated code rate and a respective associated capacity. The blocks of encoded bits include nested blocks, and each nested block includes a subcode of another one of the blocks of encoded bits that has a higher respective associated code rate than the nested block. The nested blocks include coupled blocks that are coupled to each other. The coupled blocks may provide or support such features as any one or more of the following: flexible output order based on blockwise code rate and capacity, flexible decoding order based on blockwise code rate and capacity, or variable blockwise code rate.[French] Des blocs de bits codés sont obtenus par codage de bits d'entrée, et sont fournis en sortie, par exemple, aux fins d'une transmission. Chacun des blocs de bits codés présente un débit de code associé respectif et une capacité associée respective. Les blocs de bits codés comprennent des blocs imbriqués, et chaque bloc imbriqué comprend un sous-code d'un autre bloc parmi les blocs de bits codés qui présente un débit de code associé respectif plus élevé que celui du bloc imbriqué. Les blocs imbriqués comprennent des blocs couplés qui sont couplés entre eux. Les blocs couplés peuvent fournir ou prendre en charge de telles caractéristiques en tant que l'un quelconque ou plusieurs des éléments suivants : un ordre de sortie flexible basé sur une capacité et un débit de code concernant un bloc, un ordre de décodage flexible basé sur une capacité et un débit de code concernant un bloc, ou un débit de code concernant un bloc variable.
An error has occurred. This application may no longer respond until reloaded. Reload 🗙