WO2024192912 - METHODS, SYSTEMS, AND APPARATUS FOR RATELESS POLAR CODING
National phase entry:
Publication Number
WO/2024/192912
Publication Date
26.09.2024
International Application No.
PCT/CN2023/102653
International Filing Date
27.06.2023
Title **
[English]
METHODS, SYSTEMS, AND APPARATUS FOR RATELESS POLAR CODING
[French]
PROCÉDÉS, SYSTÈMES ET APPAREIL DE CODAGE POLAIRE SANS DÉBIT
Applicants **
HUAWEI TECHNOLOGIES CO., LTD.
Huawei Administration Building, Bantian, Longgang District
Shenzhen, Guangdong 518129, CN
Inventors
ZHANG, Huazi
Suite 400, 303 Terry Fox Drive, Kanata
Ontario 231, CA
WANG, Jun
Huawei Administration Building, Bantian, Longgang District
Shenzhen, Guangdong 518129, CN
TONG, Wen
Suite 400, 303 Terry Fox Drive, Kanata
Ontario 231, CA
Priority Data
63/454,067
23.03.2023
US
PCT/CN2023/083350
23.03.2023
CN
PCT/CN2023/083345
23.03.2023
CN
PCT/CN2023/083348
23.03.2023
CN
Application details
| Total Number of Claims/PCT | * |
| Number of Independent Claims | * |
| Number of Priorities | * |
| Number of Multi-Dependent Claims | * |
| Number of Drawings | * |
| Pages for Publication | * |
| Number of Pages with Drawings | * |
| Pages of Specification | * |
| * | |
| * | |
International Searching Authority |
CNIPA
* |
| Applicant's Legal Status |
Legal Entity
* |
| * | |
| * | |
| * | |
| * | |
| Entry into National Phase under |
Chapter I
* |
| Translation |
|
Recalculate
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Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing | 3912 | |
| EPO | Filing, Examination | 39897 | |
| Japan | Filing | 531 | |
| South Korea | Filing | 673 | |
| USA | Filing, Examination | 17735 |
Total: 62748 USD
The term for entry into the National Phase has expired. This quotation is for informational purposes only
Abstract[English]
Input bits are encoded by a polar code to obtain encoded bits, and a first subset of the encoded bits corresponds to a first subset of bit indices that the polar code includes or provides. The bit indices include a first set of bit indices for values of the input bits and a second set of bit indices for a predetermined bit value. The first set of bit indices includes the first subset of bit indices and a second subset of bit indices. The values of the input bits include an input bit value placed on both a first bit index in the first subset and a second bit index in the second subset. The first bit index is based on a first sort order of the first subset of bit indices, and the second bit index is based on a second sort order of the second subset of bit indices.[French]
Des bits d'entrée sont codés par un code polaire pour obtenir des bits codés, et un premier sous-ensemble des bits codés correspond à un premier sous-ensemble d'indices de bit que le code polaire comprend ou fournit. Les indices de bit comprennent un premier ensemble d'indices de bit pour des valeurs des bits d'entrée et un second ensemble d'indices de bit pour une valeur de bits prédéterminée. Le premier ensemble d'indices de bit comprend le premier sous-ensemble d'indices de bit et un second sous-ensemble d'indices de bit. Les valeurs des bits d'entrée comprennent une valeur de bit d'entrée placée à la fois sur un premier indice de bit dans le premier sous-ensemble et sur un second indice de bit dans le second sous-ensemble. Le premier indice de bit est basé sur un premier ordre de tri du premier sous-ensemble d'indices de bit, et le second indice de bit est basé sur un second ordre de tri du second sous-ensemble d'indices de bit.