WO2024243838 - ARRAY SUBSTRATE AND DISPLAY APPARATUS
National phase entry is expected:
Publication Number
WO/2024/243838
Publication Date
05.12.2024
International Application No.
PCT/CN2023/097339
International Filing Date
31.05.2023
Title **
[English]
ARRAY SUBSTRATE AND DISPLAY APPARATUS
[French]
SUBSTRAT MATRICIEL ET APPAREIL D'AFFICHAGE
Applicants **
BOE TECHNOLOGY GROUP CO., LTD.
No.10 Jiuxianqiao Rd.
Chaoyang District, Beijing 100015, CN
Inventors
WANG, Dongfang
No.9 Dize Rd., BDA
Daxing District, Beijing 100176, CN
NING, Ce
No.9 Dize Rd., BDA
Daxing District, Beijing 100176, CN
YUAN, Guangcai
No.9 Dize Rd., BDA
Daxing District, Beijing 100176, CN
DONG, Xue
No.9 Dize Rd., BDA
Daxing District, Beijing 100176, CN
WANG, Lizhong
No.9 Dize Rd., BDA
Daxing District, Beijing 100176, CN
LIU, Fengjuan
No.9 Dize Rd., BDA
Daxing District, Beijing 100176, CN
HU, Hehe
No.9 Dize Rd., BDA
Daxing District, Beijing 100176, CN
LIU, Wei
No.9 Dize Rd., BDA
Daxing District, Beijing 100176, CN
FU, Yuting
No.9 Dize Rd., BDA
Daxing District, Beijing 100176, CN
Application details
| Total Number of Claims/PCT | * |
| Number of Independent Claims | * |
| Number of Priorities | * |
| Number of Multi-Dependent Claims | * |
| Number of Drawings | * |
| Pages for Publication | * |
| Number of Pages with Drawings | * |
| Pages of Specification | * |
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International Searching Authority |
CNIPA
* |
| Applicant's Legal Status |
Legal Entity
* |
| * | |
| * | |
| * | |
| * | |
| Entry into National Phase under |
Chapter I
* |
| Translation |
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Recalculate
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Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing | 2651 | |
| EPO | Filing, Examination | 14455 | |
| Japan | Filing | 590 | |
| South Korea | Filing | 482 | |
| USA | Filing, Examination | 5610 |
Total: 23788 USD
The term for entry into the National Phase has expired. This quotation is for informational purposes only
Abstract[English]
An array substrate is provided. The array substrate includes a base substrate; a signal line; a buffer layer; an active layer; a second signal line; a first passivation layer; a planarization layer; a pixel electrode; a first via extending through the buffer layer, and exposing at least a part of the signal line; and a second via extending through the first passivation layer, and exposing at least a part of the pixel electrode. With respective to a same second signal line, a first minimum distance between an orthographic projection of the first via on the base substrate and an orthographic projection of the second signal line on the base substrate is greater than a second minimum distance between an orthographic projection of the second via on the base substrate and the orthographic projection of the second signal line on the base substrate.[French]
L'invention propose un substrat matriciel. Le substrat matriciel comprend un substrat de base ; une ligne de signal ; une couche tampon ; une couche photoactive ; une seconde ligne de signal ; une première couche de passivation ; une couche de planarisation ; une électrode de pixel ; un premier trou d'interconnexion s'étendant à travers la couche tampon et exposant au moins une partie de la ligne de signal ; et un second trou d'interconnexion s'étendant à travers la première couche de passivation et exposant au moins une partie de l'électrode de pixel. Par rapport à une même seconde ligne de signal, une première distance minimale entre une projection orthographique du premier trou d'interconnexion sur le substrat de base et une projection orthographique de la seconde ligne de signal sur le substrat de base est supérieure à une seconde distance minimale entre une projection orthographique du second trou d'interconnexion sur le substrat de base et la projection orthographique de la seconde ligne de signal sur le substrat de base.