WO2023030280 - METHODS AND DEVICES FOR COMPUTING A MEMORY SIZE FOR SOFTWARE OPTIMIZATION
National phase entry is expected:
Publication Number
WO/2023/030280
Publication Date
09.03.2023
International Application No.
PCT/CN2022/115653
International Filing Date
30.08.2022
Title **
[English]
METHODS AND DEVICES FOR COMPUTING A MEMORY SIZE FOR SOFTWARE OPTIMIZATION
[French]
PROCÉDÉS ET DISPOSITIFS DE CALCUL D'UNE TAILLE DE MÉMOIRE POUR OPTIMISATION LOGICIELLE
Applicants **
HUAWEI TECHNOLOGIES CO., LTD.
Huawei Administration Building
Bantian, Longgang District
Shenzhen, Guangdong 518129, CN
Inventors
DENG, Xun
Unit 7, 10 St Moritz Way
Markham, Ontario L3R 4E8, CA
WANG, Kai-Ting Amy
8 Bluejay Pl.
Toronto, Ontario M3B 1V9, CA
Priority Data
17/460,749
30.08.2021
US
Application details
| Total Number of Claims/PCT | * |
| Number of Independent Claims | * |
| Number of Priorities | * |
| Number of Multi-Dependent Claims | * |
| Number of Drawings | * |
| Pages for Publication | * |
| Number of Pages with Drawings | * |
| Pages of Specification | * |
| * | |
| * | |
International Searching Authority |
CNIPA
* |
| Applicant's Legal Status |
Legal Entity
* |
| * | |
| * | |
| * | |
| * | |
| Entry into National Phase under |
Chapter I
* |
| Translation |
|
Recalculate
* The data is based on automatic recognition. Please verify and amend if necessary.
** IP-Coster compiles data from publicly available sources. If this data includes your personal information, you can contact us to request its removal.
Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing | 1260 | |
| EPO | Filing, Examination | 8832 | |
| Japan | Filing | 591 | |
| South Korea | Filing | 575 | |
| USA | Filing, Examination | 2710 |

Total: 13968 USD
The term for entry into the National Phase has expired. This quotation is for informational purposes only
Abstract[English]
There is provided methods and devices for computing a tile size for software optimization. A method includes receiving, by a computing device, information indicative of one or more of a set of loop bounds and a set of data shapes; processing, by the computing device, the information to determine a computation configuration based on the obtained information, the computation configuration implementable by a compiler, said processing including evaluating at least the computation configuration based on a build cost model, the build cost model representative of a data transfer cost and a data efficiency of the computation configuration; and transmitting, by the computing device, instructions directing the compiler to implement the computation configuration.[French]
L'invention concerne des procédés et des dispositifs de calcul d'une taille de pavé pour optimisation logicielle. Un procédé consiste à recevoir, par un dispositif informatique, des informations indiquant un ensemble de bornes de boucle et/ou un ensemble de formes de données; à traiter, par le dispositif informatique, les informations pour déterminer une configuration de calcul sur la base des informations obtenues, la configuration de calcul pouvant être implémentée par un compilateur, ledit traitement comprenant l'évaluation au moins de la configuration de calcul sur la base d'un modèle de coût construit, le modèle de coût construit représentant un coût de transfert de données et une efficacité de données de la configuration de calcul; et à transmettre, par le dispositif informatique, des instructions ordonnant au compilateur d'implémenter la configuration de calcul.