WO2023164894 - MICRO LED, MICRO LED PANEL AND MICRO LED CHIP
National phase entry:
Publication Number
WO/2023/164894
Publication Date
07.09.2023
International Application No.
PCT/CN2022/079086
International Filing Date
03.03.2022
Title **
[English]
MICRO LED, MICRO LED PANEL AND MICRO LED CHIP
[French]
MICRO-DEL, PANNEAU À MICRO-DEL ET PUCE À MICRO-DEL
Applicants **
JADE BIRD DISPLAY (SHANGHAI) LIMITED
Inventors
GUO, Jian
LI, Qiming
XU, Huiwen
Application details
| Total Number of Claims/PCT | * |
| Number of Independent Claims | * |
| Number of Priorities | * |
| Number of Multi-Dependent Claims | * |
| Number of Drawings | * |
| Pages for Publication | * |
| Number of Pages with Drawings | * |
| Pages of Specification | * |
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| Number of Office Actions | * |
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International Searching Authority |
CNIPA
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| Recordal of a Change of the Applicant's Name/Address |
Change of Applicant's Name and Address
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| Type of Assignment |
The Standard Agent's Assignment
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| Applicant's Legal Status |
Legal Entity
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| * | |
| * | |
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| Entry into National Phase under |
Chapter I
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| Patent Delivery |
Send the Letters Patent by Courier
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| Translation |
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* The data is based on automatic recognition. Please verify and amend if necessary.
** IP-Coster compiles data from publicly available sources. If this data includes your personal information, you can contact us to request its removal.
Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing, Examination, Granting | 1671 | |
| EPO | Filing, Examination, Granting | 12072 | |
| Japan | Filing, Examination, Granting | 2213 | |
| South Korea | Filing, Examination, Granting | 2053 | |
| USA | Filing, Examination, Granting | 4740 |
Total:
22,749
The term for entry into the National Phase has expired. This quotation is for informational purposes only
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Abstract[English]
Amicro LED includes a first type semiconductor layer; a light emitting layer formed on the first type semiconductor layer; a second type semiconductor layer formed on the light emitting layer; wherein, at least one part of a sidewall of the second type semiconductor layer is not aligned with a sidewall of the first type semiconductor layer.[French]
Une couche semi-conductrice de premier type comprend une couche semi-conductrice de premier type ; une couche électroluminescente formée sur la couche semi-conductrice de premier type ; une couche semi-conductrice de second type formée sur la couche électroluminescente ; au moins une partie d'une paroi latérale de la couche semi-conductrice de second type n'étant pas alignée avec une paroi latérale de la couche semi-conductrice de premier type.