WO2023123035 - SCAN CIRCUIT, DISPLAY APPARATUS, METHOD OF DRIVING SCAN CIRCUIT
National phase entry:
Publication Number
WO/2023/123035
Publication Date
06.07.2023
International Application No.
PCT/CN2021/142424
International Filing Date
29.12.2021
Title **
[English]
SCAN CIRCUIT, DISPLAY APPARATUS, METHOD OF DRIVING SCAN CIRCUIT
[French]
CIRCUIT DE BALAYAGE, APPAREIL D'AFFICHAGE, PROCÉDÉ D'ATTAQUE DE CIRCUIT DE BALAYAGE
Applicants **
BOE TECHNOLOGY GROUP CO., LTD.
CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Inventors
LIU, Song
BAI, Lu
ZHOU, Yang
ZHANG, Xin
DAI, Junxiu
WEI, Liheng
CHEN, Tianci
CHEN, Jiaxing
Application details
| Total Number of Claims/PCT | * |
| Number of Independent Claims | * |
| Number of Priorities | * |
| Number of Multi-Dependent Claims | * |
| Number of Drawings | * |
| Pages for Publication | * |
| Number of Pages with Drawings | * |
| Pages of Specification | * |
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| Number of Office Actions | * |
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International Searching Authority |
CNIPA
* |
| Recordal of a Change of the Applicant's Name/Address |
Change of Applicant's Name and Address
* |
| Type of Assignment |
The Standard Agent's Assignment
* |
| Applicant's Legal Status |
Legal Entity
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| * | |
| * | |
| * | |
| * | |
| * | |
| Entry into National Phase under |
Chapter I
* |
| Patent Delivery |
Send the Letters Patent by Courier
* |
| Translation |
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* The data is based on automatic recognition. Please verify and amend if necessary.
** IP-Coster compiles data from publicly available sources. If this data includes your personal information, you can contact us to request its removal.
Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing, Examination, Granting | 2034 | |
| EPO | Filing, Examination, Granting | 15048 | |
| Japan | Filing, Examination, Granting | 2432 | |
| South Korea | Filing, Examination, Granting | 2535 | |
| USA | Filing, Examination, Granting | 4940 |
Total:
26,989
The term for entry into the National Phase has expired. This quotation is for informational purposes only
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Abstract[English]
A scan circuit is provided. The scan circuit includes a plurality of stages. A respective stage of the scan circuit includes a first scan unit and a second scan unit configured to provide control signals to different rows of subpixels. Output from the first scan unit is input to the second scan unit through one of M rows of subpixels. M is an integer ≥ 2.[French]
L'invention concerne un circuit de balayage. Le circuit de balayage comprend une pluralité d'étages. Un étage respectif du circuit de balayage comprend une première unité de balayage et une seconde unité de balayage conçues pour fournir des signaux de commande à différentes rangées de sous-pixels. La sortie de la première unité de balayage est entrée dans la seconde unité de balayage par l'une de M rangées de sous-pixels. M est un nombre entier ≥ 2.