WO2023115406 - ARRAY SUBSTRATE AND DISPLAY APPARATUS
National phase entry:
Publication Number
WO/2023/115406
Publication Date
29.06.2023
International Application No.
PCT/CN2021/140582
International Filing Date
22.12.2021
Title **
[English]
ARRAY SUBSTRATE AND DISPLAY APPARATUS
[French]
SUBSTRAT MATRICIEL ET APPAREIL D'AFFICHAGE
Applicants **
BOE TECHNOLOGY GROUP CO., LTD.
No.10 Jiuxianqiao Rd., Chaoyang District
Beijing 100015, CN
CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
No.1188 Hezuo Rd., (West Zone), Hi-Tech Development Zone
Chengdu, Sichuan 611731, CN
Inventors
WANG, Binyan
No.9 Dize Rd., BDA
Beijing 100176, CN
GU, Pinchao
No.9 Dize Rd., BDA
Beijing 100176, CN
MA, Long
No.9 Dize Rd., BDA
Beijing 100176, CN
CHENG, Tianyi
No.9 Dize Rd., BDA
Beijing 100176, CN
Application details
| Total Number of Claims/PCT | * |
| Number of Independent Claims | * |
| Number of Priorities | * |
| Number of Multi-Dependent Claims | * |
| Number of Drawings | * |
| Pages for Publication | * |
| Number of Pages with Drawings | * |
| Pages of Specification | * |
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International Searching Authority |
CNIPA
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| Applicant's Legal Status |
Legal Entity
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| * | |
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| Entry into National Phase under |
Chapter I
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| Translation |
|
Recalculate
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Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing | 1452 | |
| EPO | Filing, Examination | 9556 | |
| Japan | Filing | 591 | |
| South Korea | Filing | 482 | |
| USA | Filing, Examination | 2710 |
Total: 14791 USD
The term for entry into the National Phase has expired. This quotation is for informational purposes only
Abstract[English]
An array substrate and a display apparatus are provided. The array substrate includes a first adjacent data line (DL1) and a second adjacent data line (DL2) extending along a first direction (DR1). The first adjacent data line (DL1) and the second adjacent data line (DL2) extend from a same inter-column region between a first column of pixel driving circuit (C1) and a second column of pixel driving circuit (C2) in a display area (DA) into a boundary area (BA) between the first column of pixel driving circuit (C1) and a peripheral area (PA). In the boundary area (BA), the first adjacent data line (DL1) and the second adjacent data line (DL2) are in a same layer.[French]
L'invention concerne un substrat matriciel et un appareil d'affichage. Le substrat matriciel comprend une première ligne de données adjacente (DL1) et une seconde ligne de données adjacente (DL2) s'étendant le long d'une première direction (DR1). La première ligne de données adjacente (DL1) et la seconde ligne de données adjacente (DL2) s'étendent à partir d'une même région inter-colonnes entre une première colonne de circuit d'attaque de pixels (C1) et une seconde colonne de circuit d'attaque de pixels (C2) dans une zone d'affichage (DA) dans une zone limite (BA) entre la première colonne de circuit d'attaque de pixels (C1) et une zone périphérique (PA). Dans la zone limite (BA), la première ligne de données adjacente (DL1) et la seconde ligne de données adjacente (DL2) sont dans une même couche.