WO2023050255 - PIXEL DRIVING CIRCUIT, DISPLAY PANEL, METHOD OF DRIVING DISPLAY PANEL
National phase entry:
Publication Number
WO/2023/050255
Publication Date
06.04.2023
International Application No.
PCT/CN2021/122038
International Filing Date
30.09.2021
Title **
[English]
PIXEL DRIVING CIRCUIT, DISPLAY PANEL, METHOD OF DRIVING DISPLAY PANEL
[French]
CIRCUIT D'ATTAQUE DE PIXEL, ÉCRAN D'AFFICHAGE, PROCÉDÉ D'ATTAQUE D'ÉCRAN D'AFFICHAGE
Applicants **
BOE TECHNOLOGY GROUP CO., LTD.
No.10 Jiuxianqiao Rd., Chaoyang District
Beijing 100015, CN
Inventors
HUANGFU, Lujiang
No.9 Dize Rd., BDA
Beijing 100176, CN
WANG, Li
No.9 Dize Rd., BDA
Beijing 100176, CN
ZHU, Jianchao
No.9 Dize Rd., BDA
Beijing 100176, CN
LIU, Libin
No.9 Dize Rd., BDA
Beijing 100176, CN
FENG, Yu
No.9 Dize Rd., BDA
Beijing 100176, CN
Application details
| Total Number of Claims/PCT | * |
| Number of Independent Claims | * |
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| Number of Multi-Dependent Claims | * |
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| Pages for Publication | * |
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| Pages of Specification | * |
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International Searching Authority |
CNIPA
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| Applicant's Legal Status |
Legal Entity
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| * | |
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| Entry into National Phase under |
Chapter I
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| Translation |
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Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing | 1292 | |
| EPO | Filing, Examination | 9101 | |
| Japan | Filing | 589 | |
| South Korea | Filing | 482 | |
| USA | Filing, Examination | 2710 |
Total: 14174 USD
The term for entry into the National Phase has expired. This quotation is for informational purposes only
Abstract[English]
A pixel driving circuit is provided.The pixel driving circuit includes a storage capacitor (Cst) having a first capacitor electrode (Ce1) and a second capacitor electrode (Ce2); a driving transistor (Td) configured to generate a driving current; and a switch (SW) configured to control connection or disconnection between a gate electrode of the driving transistor (Td) and the first capacitor electrode (Ce1).[French]
L'invention concerne un circuit d'attaque de pixel. Le circuit d'attaque de pixel comprend un condensateur de stockage (Cst) ayant une première électrode de condensateur (Ce1) et une seconde électrode de condensateur (Ce2) ; un transistor d'attaque (Td) configuré pour générer un courant d'attaque ; et un commutateur (SW) configuré pour commander la connexion ou la déconnexion entre une électrode de grille du transistor d'attaque (Td) et la première électrode de condensateur (Ce1).