WO2023050036 - FINE-GRAINED CONTROL OF INSTRUCTION ATTRIBUTES
National phase entry:
Publication Number
WO/2023/050036
Publication Date
06.04.2023
International Application No.
PCT/CN2021/121199
International Filing Date
28.09.2021
Title **
[English]
FINE-GRAINED CONTROL OF INSTRUCTION ATTRIBUTES
[French]
COMMANDE PRÉCISE D'ATTRIBUTS D'INSTRUCTION
Applicants **
HUAWEI TECHNOLOGIES CO., LTD.
Huawei Administration Building, Bantian, Longgang District
Shenzhen, Guangdong 518129, CN
Inventors
GABOR, Ron
Huawei Administration Building, Bantian, Longgang District
Shenzhen, Guangdong 518129, CN
BERGER, Yair
Huawei Administration Building, Bantian, Longgang District
Shenzhen, Guangdong 518129, CN
LI, Shuo
Huawei Administration Building, Bantian, Longgang District
Shenzhen, Guangdong 518129, CN
SADE, Raanan
Huawei Administration Building, Bantian, Longgang District
Shenzhen, Guangdong 518129, CN
YANOVER, Igor
Huawei Administration Building, Bantian, Longgang District
Shenzhen, Guangdong 518129, CN
LI, Jinfeng
Huawei Administration Building, Bantian, Longgang District
Shenzhen, Guangdong 518129, CN
Application details
| Total Number of Claims/PCT | * |
| Number of Independent Claims | * |
| Number of Priorities | * |
| Number of Multi-Dependent Claims | * |
| Number of Drawings | * |
| Pages for Publication | * |
| Number of Pages with Drawings | * |
| Pages of Specification | * |
| * | |
| * | |
International Searching Authority |
CNIPA
* |
| Applicant's Legal Status |
Legal Entity
* |
| * | |
| * | |
| * | |
| * | |
| Entry into National Phase under |
Chapter I
* |
| Translation |
|
Recalculate
* The data is based on automatic recognition. Please verify and amend if necessary.
** IP-Coster compiles data from publicly available sources. If this data includes your personal information, you can contact us to request its removal.
Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing | 1318 | |
| EPO | Filing, Examination | 9070 | |
| Japan | Filing | 587 | |
| South Korea | Filing | 482 | |
| USA | Filing, Examination | 5110 |

Total: 16567 USD
The term for entry into the National Phase has expired. This quotation is for informational purposes only
Abstract[English]
A device comprises processing circuitry adapted for executing a plurality of compiled computer instructions. Executing the plurality of compiled computer instructions comprises identifying in a plurality of compiled computer instructions, generated from a source code, a mark marking one or more marked instructions of the plurality of compiled computer instructions, where the mark is added to the plurality of compiled computer instructions according to at least one programmer directive in the source code. In response to identifying the mark, a state of the processing circuitry is configured to apply an identified execution attribute to at least one of the one or more marked instructions. When executing the one or more marked instructions, the identified execution attribute is applied thereto according to the configured state of the processing circuitry.[French]
Un dispositif comprend un circuit de traitement conçu pour exécuter une pluralité d'instructions informatiques compilées. L'exécution de la pluralité d'instructions informatiques compilées comprend l'identification dans une pluralité d'instructions informatiques compilées, générées à partir d'un code source, d'une marque marquant une ou plusieurs instructions marquées de la pluralité d'instructions informatiques compilées, la marque étant ajoutée à la pluralité d'instructions informatiques compilées selon au moins une directive de programmation dans le code source. En réponse à l'identification de la marque, un état du circuit de traitement est configuré pour appliquer un attribut d'exécution identifié à l'instruction marquée ou à moins l'une des instructions marquées. Lors de l'exécution de la ou des instructions marquées, l'attribut d'exécution identifié y est appliqué en fonction de l'état configuré du circuit de traitement.