WO2026104914 - QUANTUM CONTROL INTERFACE FOR EXTERNAL COMPUTE RESOURCES
National phase entry is expected:
Publication Number
WO/2026/104914
Publication Date
21.05.2026
International Application No.
PCT/IB2025/060674
International Filing Date
20.10.2025
Title **
[English]
QUANTUM CONTROL INTERFACE FOR EXTERNAL COMPUTE RESOURCES
[French]
INTERFACE DE COMMANDE QUANTIQUE DE RESSOURCES DE CALCUL EXTERNES
Applicants **
Q.M TECHNOLOGIES LTD.
Inventors
WERTHEIM, Oded
COHEN, Yonatan
ZIV, Avishai
WEBER, Ori
SZMUK, Ramon
SCHLIPF, Lukas
BISMUT, Assaf
SIVAN, Itamar
Priority Data
63/720,325
14.11.2024
US
19/257,012
01.07.2025
US
Application details
| Total Number of Claims/PCT | * |
| Number of Independent Claims | * |
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International Searching Authority |
ILPO
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| Recordal of a Change of the Applicant's Name/Address |
Change of Applicant's Name and Address
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| Type of Assignment |
The Standard Agent's Assignment
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| Applicant's Legal Status |
Legal Entity
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| * | |
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| Entry into National Phase under |
Chapter I
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| Patent Delivery |
Send the Letters Patent by Courier
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| 译文 |
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* The data is based on automatic recognition. Please verify and amend if necessary.
** IP-Coster compiles data from publicly available sources. If this data includes your personal information, you can contact us to request its removal.
Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing, Examination, Granting | 2649 | |
| EPO | Filing, Examination, Granting | 20218 | |
| Japan | Filing, Examination, Granting | 2678 | |
| South Korea | Filing, Examination, Granting | 3291 | |
| USA | Filing, Examination, Granting | 7140 |
Total:
35,976
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Abstract[English]
This disclosure provides a quantum control system designed to enable low-latency, high-performance communication between quantum processors and classical computing resources. The system integrates optical interconnects, high-speed PCIe-based interfaces and flexible data packet structures to support Quantum Error Correction (QEC), gate calibration, and real-time optimization. The architecture allows independent scaling of quantum and classical resources, promoting adaptability and high-throughput performance.[French]
La présente divulgation concerne un système de commande quantique conçu pour permettre une communication à faible latence et haute performance entre des processeurs quantiques et des ressources informatiques classiques. Le système intègre des interconnexions optiques, des interfaces basées sur PCIe à grande vitesse et des structures de paquets de données flexibles pour prendre en charge une correction d'erreur quantique (QEC), un étalonnage de porte et une optimisation en temps réel. L'architecture permet une mise à l'échelle indépendante de ressources quantiques et classiques, ce qui favorise l'adaptabilité et la performance à haut débit.