WO2025262543 - METHOD FOR MANUFACTURING AN INTEGRATED DEVICE COMPRISING AN ANODIZABLE LAYER
National phase entry is expected:
Publication Number
WO/2025/262543
Publication Date
26.12.2025
International Application No.
PCT/IB2025/056081
International Filing Date
13.06.2025
Title **
[English]
METHOD FOR MANUFACTURING AN INTEGRATED DEVICE COMPRISING AN ANODIZABLE LAYER
[French]
PROCÉDÉ DE FABRICATION D'UN DISPOSITIF INTÉGRÉ COMPRENANT UNE COUCHE ANODABLE
Applicants **
PSEMI CORPORATION
Inventors
VOIRON, Frédéric
SOULIER, Brigitte
SALLAZ, Valentin
CANDRA, Panglijen
KOUASSI, Sébastien
Priority Data
24305951.6
17.06.2024
EP
Application details
| Total Number of Claims/PCT | * |
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International Searching Authority |
EPO
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| Recordal of a Change of the Applicant's Name/Address |
Change of Applicant's Name and Address
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| Type of Assignment |
The Standard Agent's Assignment
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| Applicant's Legal Status |
Legal Entity
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| Entry into National Phase under |
Chapter I
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| Patent Delivery |
Send the Letters Patent by Courier
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| 译文 |
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Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing, Examination, Granting | 2026 | |
| EPO | Filing, Examination, Granting | 8107 | |
| Japan | Filing, Examination, Granting | 2154 | |
| South Korea | Filing, Examination, Granting | 2066 | |
| USA | Filing, Examination, Granting | 4740 |
Total:
19,093
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Abstract[English]
A method for manufacturing an integrated device, comprising: providing a support (100) having a first conductive via (102) coming out on a face (F1) of the support so as to be flush with the face of the support, the via being surrounded by an insulating region (103) at the level of said face, forming an anodization barrier region (204) above said face of the support, the anodization barrier layer being in electrical contact with the via, forming a region (202) of anodizable material above the anodization barrier region and above the conductive via, anodizing the region of anodizable material to obtain a porous region (210) comprising straight vertical pores (FOR) extending from a top surface of the region to reach the anodization barrier region, forming, within the porous region, a second conductive via (220) extending between the top surface of the porous region and the anodization barrier region, so as to form an electrical connection between the conductive via and the top surface of the porous region.[French]
L'invention concerne un procédé de fabrication d'un dispositif intégré, comprenant : la fourniture d'un support (100) ayant un premier trou d'interconnexion conducteur (102) sortant sur une face (F1) du support de manière à affleurer la face du support, le trou d'interconnexion étant entouré d'une région isolante (103) au niveau de ladite face, formant une région barrière d'anodisation (204) au-dessus de ladite face du support, la couche barrière d'anodisation étant en contact électrique avec le trou d'interconnexion, formant une région (202) de matériau anodisable au-dessus de la région barrière d'anodisation et au-dessus du trou d'interconnexion conducteur, l'anodisation de la région de matériau anodisable pour obtenir une région poreuse (210) comprenant des pores verticaux droits (FOR) s'étendant depuis une surface supérieure de la région pour atteindre la région barrière d'anodisation, formant, au sein de la région poreuse, un deuxième trou d'interconnexion conducteur (220) s'étendant entre la surface supérieure de la région poreuse et la région barrière d'anodisation, de manière à former une connexion électrique entre le trou d'interconnexion conducteur et la surface supérieure de la région poreuse.