WO2025218434 - SEMICONDUCTOR PACKAGE
National phase entry is expected:
Publication Number
WO/2025/218434
Publication Date
23.10.2025
International Application No.
PCT/CN2025/083699
International Filing Date
20.03.2025
Title **
[English]
SEMICONDUCTOR PACKAGE
[French]
BOÎTIER DE SEMI-CONDUCTEURS
[Chinese]
半导体封装体
Applicants **
CXMT CORPORATION
Inventors
CHUANG, Ling-Yi
LIU, Ying
Priority Data
202410473944.4
18.04.2024
CN
Application details
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International Searching Authority |
CNIPA
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| Recordal of a Change of the Applicant's Name/Address |
Change of Applicant's Name and Address
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| Type of Assignment |
The Standard Agent's Assignment
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| Applicant's Legal Status |
Legal Entity
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| Entry into National Phase under |
Chapter I
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| Patent Delivery |
Send the Letters Patent by Courier
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| 译文 |
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Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing, Examination, Granting | 1692 | |
| EPO | Filing, Examination, Granting | 11576 | |
| Japan | Filing, Examination, Granting | 2124 | |
| South Korea | Filing, Examination, Granting | 2071 | |
| USA | Filing, Examination, Granting | 4740 |
Total:
22,203
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Abstract[English]
Embodiments of the present disclosure provide a semiconductor package, comprising: a first semiconductor chip and a second semiconductor chip; and a first material layer arranged between the first semiconductor chip and the second semiconductor chip, wherein the first material layer comprises a non-conductive base material as well as a first-type filler and a second-type filler which are distributed in the non-conductive base material, and the average particle size of the first-type filler is different from the average particle size of the second-type filler. In the embodiments of the present disclosure, two types of fillers having a particle size difference are used in combination, thereby increasing the fill rate of the fillers and improving the CTE of the material layer.[French]
Des modes de réalisation de la présente divulgation concernent un boîtier de semi-conducteurs comprenant : une première puce semi-conductrice et une seconde puce semi-conductrice ; et une première couche de matériau disposée entre la première puce semi-conductrice et la seconde puce semi-conductrice, la première couche de matériau comprenant un matériau de base non conducteur ainsi qu'une charge de premier type et une charge de second type qui sont réparties dans le matériau de base non conducteur, et la taille moyenne de particule de la charge de premier type étant différente de la taille de particule moyenne de la charge de second type. Dans les modes de réalisation de la présente divulgation, deux types de charges présentant une différence de taille de particule sont utilisés en combinaison, ce qui permet d'augmenter le taux de remplissage des charges et d'améliorer le CTE de la couche de matériau.[Chinese]
本公开实施例提供了一种半导体封装体，包括：第一半导体芯片和第二半导体芯片；设置在第一半导体芯片与第二半导体芯片之间的第一材料层；其中，第一材料层包括非导电性基材以及分布于非导电性基材中的第一类填料和第二类填料，第一类填料的平均粒度不同于第二类填料的平均粒度。本公开的实施例中，利用具有粒度差的两类填料配合使用，增加填料的填充率，改善材料层的CTE。