WO2025255726 - SCAN CIRCUIT, METHOD OF OPERATING SCAN CIRCUIT, AND DISPLAY APPARATUS
National phase entry is expected:
Publication Number
WO/2025/255726
Publication Date
18.12.2025
International Application No.
PCT/CN2024/098535
International Filing Date
12.06.2024
Title **
[English]
SCAN CIRCUIT, METHOD OF OPERATING SCAN CIRCUIT, AND DISPLAY APPARATUS
[French]
CIRCUIT DE BALAYAGE, PROCÉDÉ DE FONCTIONNEMENT DE CIRCUIT DE BALAYAGE ET APPAREIL D'AFFICHAGE
Applicants **
BOE TECHNOLOGY GROUP CO., LTD.
CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Inventors
WANG, Mengqi
AI, Sifei
WU, Jianpeng
YU, Ziyang
CHENG, Tianyi
JIANG, Zhiliang
HU, Ming
QIU, Haijun
Application details
| Total Number of Claims/PCT | * |
| Number of Independent Claims | * |
| Number of Priorities | * |
| Number of Multi-Dependent Claims | * |
| Number of Drawings | * |
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| Number of Pages with Drawings | * |
| Pages of Specification | * |
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| Number of Office Actions | * |
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International Searching Authority |
CNIPA
* |
| Recordal of a Change of the Applicant's Name/Address |
Change of Applicant's Name and Address
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| Type of Assignment |
The Standard Agent's Assignment
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| Applicant's Legal Status |
Legal Entity
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| * | |
| * | |
| * | |
| * | |
| * | |
| Entry into National Phase under |
Chapter I
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| Patent Delivery |
Send the Letters Patent by Courier
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| 译文 |
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* The data is based on automatic recognition. Please verify and amend if necessary.
** IP-Coster compiles data from publicly available sources. If this data includes your personal information, you can contact us to request its removal.
Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing, Examination, Granting | 2270 | |
| EPO | Filing, Examination, Granting | 16410 | |
| Japan | Filing, Examination, Granting | 2340 | |
| South Korea | Filing, Examination, Granting | 2444 | |
| USA | Filing, Examination, Granting | 4940 |
Total:
28,404
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Abstract[English]
A display panel having a display area and a peripheral area is provided. The display panel includes a plurality of subpixels (Sp) and a plurality of control signal lines in the display area; and one or more scan circuits and a plurality of signal lines in the peripheral area. The one or more scan circuit includes a first scan circuit, and at least a second scan circuit. The first scan circuit includes a plurality of scan units. A respective scan unit includes a second output terminal (OUT2) configured to output a control signal to a respective control signal line of the plurality of control signal lines. The plurality of signal lines in the peripheral area includes a first start signal line (GSTV) configured to provide a start signal to the respective scan unit, and at least a second start signal line (ESTV) configured to provide a start signal to the second scan circuit.[French]
L'invention concerne un écran d'affichage présentant une zone d'affichage et une zone périphérique. L'écran d'affichage comprend une pluralité de sous-pixels (Sp) et une pluralité de lignes de signal de commande dans la zone d'affichage ; et un ou plusieurs circuits de balayage et une pluralité de lignes de signal dans la zone périphérique. Le ou les circuits de balayage comprennent un premier circuit de balayage, et au moins un second circuit de balayage. Le premier circuit de balayage comprend une pluralité d'unités de balayage. Une unité de balayage respective comprend une seconde borne de sortie (OUT2) configurée pour délivrer un signal de commande à une ligne de signal de commande respective de la pluralité de lignes de signal de commande. La pluralité de lignes de signal dans la zone périphérique comprend une première ligne de signal de démarrage (GSTV) configurée pour fournir un signal de démarrage à l'unité de balayage respective, et au moins une seconde ligne de signal de démarrage (ESTV) configurée pour fournir un signal de démarrage au second circuit de balayage.