WO2026099660 - METHOD FOR USING TIMING ERROR INFORMATION FOR AI/ML POSITIONING
National phase entry is expected:
Publication Number
WO/2026/099660
Publication Date
15.05.2026
International Application No.
PCT/IB2025/060504
International Filing Date
15.10.2025
Title **
[English]
METHOD FOR USING TIMING ERROR INFORMATION FOR AI/ML POSITIONING
[French]
PROCÉDÉ D'UTILISATION D'INFORMATIONS D'ERREUR DE SYNCHRONISATION POUR UN POSITIONNEMENT PAR IA/AA
Applicants **
NOKIA TECHNOLOGIES OY
Inventors
SAHIN, Taylan
ASHRAF, Muhammad Ikram
KESHAVAMURTHY, Prajwal
FEKI, Afef
CARRILLO MELGAREJO, Dick
Priority Data
63/718,296
08.11.2024
US
Application details
| Total Number of Claims/PCT | * |
| Number of Independent Claims | * |
| Number of Priorities | * |
| Number of Multi-Dependent Claims | * |
| Number of Drawings | * |
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International Searching Authority |
EPO
* |
| Recordal of a Change of the Applicant's Name/Address |
Change of Applicant's Name and Address
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| Type of Assignment |
The Standard Agent's Assignment
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| Applicant's Legal Status |
Legal Entity
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| * | |
| * | |
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| Entry into National Phase under |
Chapter I
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| Patent Delivery |
Send the Letters Patent by Courier
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| Translation |
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* The data is based on automatic recognition. Please verify and amend if necessary.
** IP-Coster compiles data from publicly available sources. If this data includes your personal information, you can contact us to request its removal.
Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing, Examination, Granting | 2719 | |
| EPO | Filing, Examination, Granting | 15871 | |
| Japan | Filing, Examination, Granting | 2575 | |
| South Korea | Filing, Examination, Granting | 2765 | |
| USA | Filing, Examination, Granting | 6740 |
Total:
30,670
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Abstract[English]
An apparatus including at least one processor; and at least one memory storing instructions that, when executed with the at least one processor, cause the apparatus to perform: receiving, by the apparatus, a request for capability information of the apparatus regarding at least one timing error for use by the apparatus in estimating a position of the apparatus; and sending the capability information of the apparatus.[French]
L'invention concerne un appareil comprenant au moins un processeur ; et au moins une mémoire stockant des instructions qui, lorsqu'elles sont exécutées par le ou les processeurs, amènent l'appareil à effectuer : la réception, par l'appareil, d'une demande d'informations de capacité de l'appareil concernant au moins une erreur de synchronisation à des fins d'utilisation, par l'appareil, dans l'estimation d'une position de l'appareil ; et l'envoi des informations de capacité de l'appareil.