WO2025181706 - INTERLAYER COUPLER WITH MODE CONFINEMENT ROD ARRAYS FOR MULTI-LAYER PHOTONIC INTEGRATED CIRCUITS
National phase entry is expected:
Publication Number
WO/2025/181706
Publication Date
04.09.2025
International Application No.
PCT/IB2025/052082
International Filing Date
26.02.2025
Title **
[English]
INTERLAYER COUPLER WITH MODE CONFINEMENT ROD ARRAYS FOR MULTI-LAYER PHOTONIC INTEGRATED CIRCUITS
[French]
COUPLEUR INTERCOUCHE AVEC RÉSEAUX DE TIGES DE CONFINEMENT DE MODE POUR CIRCUITS INTÉGRÉS PHOTONIQUES MULTICOUCHES
Applicants **
LUMIPHASE AG
Inventors
GRANDJEAN, Loris
ELTES, Felix
COMMIN, James Paul
Priority Data
63/558,417
27.02.2024
US
Application details
| Total Number of Claims/PCT | * |
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International Searching Authority |
EPO
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| Recordal of a Change of the Applicant's Name/Address |
Change of Applicant's Name and Address
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| Type of Assignment |
The Standard Agent's Assignment
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| Applicant's Legal Status |
Legal Entity
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| * | |
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| Entry into National Phase under |
Chapter I
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| Patent Delivery |
Send the Letters Patent by Courier
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| Translation |
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* The data is based on automatic recognition. Please verify and amend if necessary.
** IP-Coster compiles data from publicly available sources. If this data includes your personal information, you can contact us to request its removal.
Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing, Examination, Granting | 2022 | |
| EPO | Filing, Examination, Granting | 8118 | |
| Japan | Filing, Examination, Granting | 2171 | |
| South Korea | Filing, Examination, Granting | 2044 | |
| USA | Filing, Examination, Granting | 4740 |
Total:
19,095
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Abstract[English]
A photonic integrated circuit includes a first optical waveguide in a lower layer, a second optical waveguide in an upper layer, and an interlayer coupler between these waveguides. The coupler has confinement rods, formed and encapsulated within cladding layers, that shape the optical modes as they transition from one waveguide to the other. In one embodiment, the lower waveguide tapers from a nominal width to a narrow section near the coupler, while the upper waveguide expands from a narrow section near the coupler to its nominal width. The method of formation involves CMOS-compatible processes, including depositing waveguide layers, patterning the confinement rods, and encapsulating them within cladding. The disclosure offers a compact, low-loss solution for guiding signals between different vertical levels in an integrated photonic device operating near the 1550 nm wavelength range.[French]
L'invention concerne un circuit intégré photonique comprenant un premier guide d'ondes optique dans une couche inférieure, un second guide d'ondes optique dans une couche supérieure, et un coupleur intercouche entre ces guides d'ondes. Le coupleur comporte des tiges de confinement, formées et encapsulées dans des couches de gainage, qui forment les modes optiques lorsqu'ils passent d'un guide d'ondes à l'autre. Dans un mode de réalisation, le guide d'ondes inférieur s'effile d'une largeur nominale à une section étroite à proximité du coupleur, tandis que le guide d'ondes supérieur s'étend d'une section étroite à proximité du coupleur à sa largeur nominale. Le procédé de formation implique des processus compatibles CMOS, comprenant le dépôt de couches de guide d'ondes, la formation de motifs sur les tiges de confinement, et leur encapsulation à l'intérieur de la gaine. La divulgation offre une solution compacte et à faible perte pour guider des signaux entre différents niveaux verticaux dans un dispositif photonique intégré fonctionnant à proximité de la plage de longueurs d'onde de 1550 nm.