WO2025248282 - METHOD AND SYSTEM FOR AUTOMATICALLY IDENTIFYING FAULTY COMPONENTS OF AN ELECTRONIC DEVICE
National phase entry is expected:
Publication Number
WO/2025/248282
Publication Date
04.12.2025
International Application No.
PCT/IB2024/055176
International Filing Date
28.05.2024
Title **
[English]
METHOD AND SYSTEM FOR AUTOMATICALLY IDENTIFYING FAULTY COMPONENTS OF AN ELECTRONIC DEVICE
[French]
PROCÉDÉ ET SYSTÈME D'IDENTIFICATION AUTOMATIQUE DE COMPOSANTS DÉFECTUEUX D'UN DISPOSITIF ÉLECTRONIQUE
Applicants **
EATON INTELLIGENT POWER LIMITED
Inventors
MULLALLY, Ruairi
HENEGHAN, Tadhg
ZUCCHETTO, Daniel
Application details
| Total Number of Claims/PCT | * |
| Number of Independent Claims | * |
| Number of Priorities | * |
| Number of Multi-Dependent Claims | * |
| Number of Drawings | * |
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| Number of Pages with Drawings | * |
| Pages of Specification | * |
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| Number of Office Actions | * |
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International Searching Authority |
EPO
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| Recordal of a Change of the Applicant's Name/Address |
Change of Applicant's Name and Address
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| Type of Assignment |
The Standard Agent's Assignment
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| Applicant's Legal Status |
Legal Entity
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| * | |
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| Entry into National Phase under |
Chapter I
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| Patent Delivery |
Send the Letters Patent by Courier
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| Translation |
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* The data is based on automatic recognition. Please verify and amend if necessary.
** IP-Coster compiles data from publicly available sources. If this data includes your personal information, you can contact us to request its removal.
Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing, Examination, Granting | 2094 | |
| EPO | Filing, Examination, Granting | 10670 | |
| Japan | Filing, Examination, Granting | 2327 | |
| South Korea | Filing, Examination, Granting | 2258 | |
| USA | Filing, Examination, Granting | 4740 |
Total:
22,089
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Abstract[English]
A method to identify a faulty component of an electronic device under test is provided. The method includes receiving a layout of the electronic device that includes a placement of a plurality of probes on the electronic device under test, the plurality of probes including at least a starting probe and an ending probe defining a signal path wherein a flow of an electrical signal flows along the signal path, applying a test signal to a beginning of the signal path, activating two or more of the plurality of probes including at least the starting probe and the ending probe, receiving signal data from each of the activated probes, and evaluating a next pair of signal data in the signal path between two probes that are selectively activated inward between the starting probe and the ending probe in consecutive tests with the test signal until detection criteria are satisfied.[French]
L'invention concerne un procédé d'identification d'un composant défectueux d'un dispositif électronique testé. Le procédé comprend la réception d'un agencement du dispositif électronique qui comprend un placement d'une pluralité de sondes sur le dispositif électronique testé, la pluralité de sondes comprenant au moins une sonde de départ et une sonde de fin délimitant un trajet de signal dans lequel un flux d'un signal électrique circule le long du trajet de signal, l'application d'un signal de test à un début du trajet de signal, l'activation d'au moins deux sondes de la pluralité de sondes comprenant au moins la sonde de départ et la sonde de fin, la réception de données de signal provenant de chacune des sondes activées, et l'évaluation d'une paire suivante de données de signal dans le trajet de signal entre deux sondes qui sont sélectivement activées vers l'intérieur entre la sonde de départ et la sonde de fin dans des tests consécutifs avec le signal de test jusqu'à ce que des critères de détection soient satisfaits.