WO2024033704 - VEHICLE COMPUTE UNIT WITH MIDDLE PLATE ARCHITECTURE
National phase entry:
Publication Number
WO/2024/033704
Publication Date
15.02.2024
International Application No.
PCT/IB2023/000482
International Filing Date
11.08.2023
Title **
[English]
VEHICLE COMPUTE UNIT WITH MIDDLE PLATE ARCHITECTURE
[French]
UNITÉ DE CALCUL DE VÉHICULE À ARCHITECTURE DE PLAQUE INTERMÉDIAIRE
Applicants **
NIO TECHNOLOGY (ANHUI) CO., LTD.
Inventors
YANG, Tseng-Mau
CHEN, Waylon, Y.
Priority Data
63/397,121
11.08.2022
US
Application details
| Total Number of Claims/PCT | * |
| Number of Independent Claims | * |
| Number of Priorities | * |
| Number of Multi-Dependent Claims | * |
| Number of Drawings | * |
| Pages for Publication | * |
| Number of Pages with Drawings | * |
| Pages of Specification | * |
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| Number of Office Actions | * |
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International Searching Authority |
EPO
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| Recordal of a Change of the Applicant's Name/Address |
Change of Applicant's Name and Address
* |
| Type of Assignment |
The Standard Agent's Assignment
* |
| Applicant's Legal Status |
Legal Entity
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| * | |
| * | |
| * | |
| * | |
| * | |
| Entry into National Phase under |
Chapter I
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| Patent Delivery |
Send the Letters Patent by Courier
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| Translation |
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* The data is based on automatic recognition. Please verify and amend if necessary.
** IP-Coster compiles data from publicly available sources. If this data includes your personal information, you can contact us to request its removal.
Quotation for National Phase entry
| Country | Stages | Total | |
|---|---|---|---|
| China | Filing, Examination, Granting | 2299 | |
| EPO | Filing, Examination, Granting | 11198 | |
| Japan | Filing, Examination, Granting | 2328 | |
| South Korea | Filing, Examination, Granting | 2345 | |
| USA | Filing, Examination, Granting | 4740 |
Total:
22,910
The term for entry into the National Phase has expired. This quotation is for informational purposes only
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Abstract[English]
An assembly for stacking a plurality of circuit boards of an electronics package is provided. The assembly may comprise a chassis structure, a first plurality of printed circuit board (PCB), and a second plurality of PCBs, where the second plurality of PCBs are configured to be coupled to connectors of the first plurality of PCBs that are accessible via connection access points in the chassis structure. The first plurality of PCBs is positioned on a first side of the chassis structure, and the second plurality of PCBs are positioned on a second side of the chassis structure. Positioning tolerancing of the second plurality of PCBs relative to the first plurality of PCBs is provided by the connectors of the first plurality of PCBs.[French]
L'invention concerne un ensemble pour empiler une pluralité de cartes de circuit imprimé d'un boîtier électronique. L'ensemble peut comprendre une structure de châssis, une première pluralité de cartes de circuit imprimé (PCB) et une seconde pluralité de PCBs, la seconde pluralité de PCBs étant configurée pour être couplée à des connecteurs de la première pluralité de PCBs qui sont accessibles par l'intermédiaire de points d'accès de connexion dans la structure de châssis. La première pluralité de PCBs est positionnée sur un premier côté de la structure de châssis, et la seconde pluralité de PCBs est positionnés sur un second côté de la structure de châssis. La tolérance de positionnement de la seconde pluralité de PCBs par rapport à la première pluralité de PCBs est fournie par les connecteurs de la première pluralité de PCBs.